Boosting Google’s Push Toward $4 Trillion with TPUs: How Can They Make a Big Impact in the Blockchain Field?

Author: Eli5DeFi

Compiled by: Tim, PANews

PANews Editor’s Note: On November 25, Google’s total market value hit an all-time high of $3.96 trillion. Factors behind the stock surge included not only its newly released, most powerful AI Gemini 3, but also its self-developed chip, TPU. Beyond the AI domain, TPUs are also poised to shine in the blockchain space.

The narrative of modern computing hardware has essentially been defined by the rise of the GPU.

From gaming to deep learning, Nvidia’s parallel architecture has become the industry standard, with CPUs gradually shifting to a supporting role.

However, as AI models hit scaling bottlenecks and blockchain technology advances toward complex cryptographic applications, a new contender has emerged: the Tensor Processing Unit (TPU).

While TPUs are often discussed within the framework of Google’s AI strategy, their architecture unexpectedly aligns with the core requirements of blockchain’s next milestone: post-quantum cryptography.

This article reviews the evolution of hardware and compares architectural features to explain why, in building quantum-resistant decentralized networks, TPUs (rather than GPUs) are better suited for the intensive mathematical computations required by post-quantum cryptography.

Hardware Evolution: From Serial Processing to Systolic Architecture

To understand the significance of TPUs, it’s essential to first understand the problems they solve.

• Central Processing Unit (CPU): The all-rounder, adept at serial processing and logic branching, but limited when it comes to performing massive parallel mathematical calculations.
• Graphics Processing Unit (GPU): The parallel processing expert, originally designed for rendering pixels, excels at executing a large number of identical tasks simultaneously (SIMD: Single Instruction, Multiple Data). This made it the backbone of the early AI boom.
• Tensor Processing Unit (TPU): A specialized chip designed by Google specifically for neural network computations.

Advantages of Systolic Architecture

The fundamental difference between GPUs and TPUs lies in their data handling methods.

GPUs repeatedly fetch memory (registers, caches) for calculations, whereas TPUs use a systolic architecture. This design, akin to a heartbeat, allows data to flow rhythmically through a massive grid of computation units.

https://www.ainewshub.org/post/ai-inference-costs-tpu-vs-gpu-2025

Computation results are passed directly to the next unit without having to write back to memory. This dramatically alleviates the Von Neumann bottleneck—the latency from data shuttling between memory and processor—enabling orders-of-magnitude increases in throughput for specific mathematical operations.

The Key to Post-Quantum Cryptography: Why Blockchains Need TPUs

The most critical application of TPUs in blockchain is not mining, but cryptographic security.

Current blockchain systems rely on elliptic curve cryptography or RSA, both of which have fatal weaknesses against Shor’s algorithm. This means that once sufficiently powerful quantum computers emerge, attackers could derive private keys from public keys, which would be enough to wipe out all encrypted assets on Bitcoin or Ethereum.

The solution lies in post-quantum cryptography. The most mainstream PQC algorithms (such as Kyber and Dilithium) are based on lattice cryptography.

Mathematical Suitability of TPUs

This is where TPUs have an edge over GPUs. Lattice cryptography heavily depends on large-scale, dense matrix and vector operations, mainly including:

• Matrix-vector multiplication: As+e (where A is a matrix, s and e are vectors).
• Polynomial operations: Ring-based algebraic computations, typically implemented using number-theoretic transforms.

Traditional GPUs treat these as general-purpose parallel tasks, while TPUs accelerate them with hardware-level, dedicated matrix computation units. The mathematical structure of lattice cryptography almost perfectly maps to the physical topology of the TPU’s systolic array.

The Technical Game: TPU vs. GPU

While GPUs remain the industry’s general-purpose powerhouse, TPUs have an absolute advantage for certain mathematically intensive tasks.

Conclusion: GPUs win on generality and ecosystem, while TPUs dominate in dense linear algebra computation efficiency—the core mathematical engine behind AI and modern advanced cryptography.

Expanding the TPU Narrative: Zero-Knowledge Proofs and Decentralized AI

Beyond post-quantum cryptography, TPUs show potential in two other key Web3 areas.

Zero-Knowledge Proofs

ZK-Rollups (such as Starknet or zkSync) are Ethereum scaling solutions whose proof generation requires massive computation, mainly involving:

• Fast Fourier Transforms: For rapid changes in data representation.
• Multi-scalar multiplication: For combining point operations on elliptic curves.
• FRI protocol: Cryptographic proof systems for polynomial verification.

These operations are not ASIC-friendly hash computations, but polynomial mathematics. Compared to general-purpose CPUs, TPUs can significantly accelerate FFT and polynomial commitment computations; due to the predictable data flow of these algorithms, TPUs often outperform GPUs in efficiency.

With the rise of decentralized AI networks like Bittensor, network nodes need to run AI model inference. Running general large language models is essentially executing massive matrix multiplications.

Compared to GPU clusters, TPUs allow decentralized nodes to process AI inference requests with lower energy consumption, improving the commercial viability of decentralized AI.

The TPU Ecosystem Landscape

Although most projects still rely on GPUs due to CUDA’s ubiquity, the following areas are poised for TPU integration, especially under the narratives of post-quantum cryptography and zero-knowledge proofs.

Zero-Knowledge Proofs and Scaling Solutions

Why choose TPUs? Because ZK proof generation requires large-scale parallel polynomial computations, and under certain architectures, TPUs process such tasks far more efficiently than general-purpose GPUs.

• Starknet (Layer 2 scaling): STARK proofs rely heavily on Fast Fourier Transforms and Fast Reed-Solomon Interactive Oracle Proofs, which align closely with TPU’s computational logic.
• zksync (Layer 2 scaling): Its Airbender prover handles massive FFT and polynomial computations—the very bottleneck TPUs can break through.
• Scroll (Layer 2 scaling): Using Halo2 and Plonk proof systems, core operations like KZG commitment verification and multi-scalar multiplication map perfectly to TPU’s systolic architecture.
• Aleo (privacy-protecting public chain): Focused on zk-SNARK proof generation, its core operations’ polynomial math aligns closely with the high-throughput capabilities of TPUs.
• Mina (lightweight public chain): Uses recursive SNARKs, requiring repeated polynomial computations—making TPU’s efficient computation highly valuable.
• Zcash (privacy coin): The classic Groth16 proof system relies on polynomial operations. While an early technology, high-throughput hardware can still greatly benefit it.
• Filecoin (DePIN, storage): Its replication proof mechanism uses zero-knowledge proofs and polynomial encoding to verify data integrity.

Decentralized AI and Agent-Based Computing

Why choose TPUs? This is their native application scenario—designed specifically to accelerate neural network machine learning tasks.

• Bittensor: Its core architecture is decentralized AI inference, natively matching the tensor computation capabilities of TPUs.
• Fetch (AI agents): Autonomous AI agents depend on continuous neural network inference for decision-making, and TPUs can run these models with lower latency.
• Singularity (AI service platform): As an AI service marketplace, integrating TPUs significantly improves the execution speed and cost-efficiency of core models.
• NEAR (public chain, AI strategy pivot): Shifting to on-chain AI and trusted execution environment agents, it depends on tensor computations that require TPU acceleration.

Post-Quantum Cryptography Networks

Why choose TPUs? The core computations of post-quantum cryptography often involve the shortest vector problem in lattices—tasks requiring dense matrix and vector operations, which are architecturally similar to AI workloads.

• Algorand (public chain): Uses quantum-safe hashing and vector operations highly compatible with TPU’s parallel mathematical capabilities.
• QAN (quantum-resistant public chain): Uses lattice cryptography, whose foundational polynomial and vector operations are structurally identical to the mathematical optimizations TPUs excel at.
• Nexus (computing platform, ZkVM): Its quantum-resistant computing preparation involves polynomial and lattice basis algorithms that efficiently map onto TPU architecture.
• Cellframe (quantum-resistant public chain): Uses lattice cryptography and hash encryption, involving tensor-like operations—an ideal candidate for TPU acceleration.
• Abelian (privacy token): Focused on post-quantum lattice operations. Like QAN, its technical architecture can fully benefit from the high-throughput vector processing of TPUs.
• Quantus (public chain): Post-quantum cryptographic signatures depend on large-scale vector computations, and TPUs’ parallelization far outstrips standard CPUs for these operations.
• Pauli (computing platform): Quantum-safe computing involves massive matrix computations—precisely where TPUs shine.

Bottlenecks: Why Aren’t TPUs Mainstream Yet?

If TPUs are so efficient for post-quantum cryptography and zero-knowledge proofs, why is the industry still scrambling for H100 chips?

• CUDA Moat: Nvidia’s CUDA software stack is the industry standard, and almost all cryptographic engineers program using CUDA. Porting code to TPU’s JAX or XLA frameworks is not only technically demanding but also resource-intensive.
• Cloud Access Barriers: High-end TPUs are almost exclusively monopolized by Google Cloud. If decentralized networks rely too heavily on a single centralized cloud provider, they face censorship risks and single points of failure.
• Rigid Architecture: If cryptographic algorithms require tweaks (such as adding branching logic), TPU performance drops sharply. GPUs handle such irregular logic far better than TPUs.
• Limitations in Hash Operations: TPUs cannot replace Bitcoin miners. SHA-256 is bit-level, not matrix computation, leaving TPUs with no role here.

Conclusion: Layered Architecture Is the Future

The future of Web3 hardware is not a winner-take-all contest, but is evolving toward a layered architecture.

GPUs will remain the mainstay for general-purpose computing, graphics rendering, and tasks involving complex branching logic.

TPUs (and similar ASIC accelerators) will gradually become the standard for the Web3 “mathematics layer,” dedicated to generating zero-knowledge proofs and verifying post-quantum cryptographic signatures.

As blockchains migrate toward post-quantum security standards, the massive matrix computations required for transaction signing and verification will make the TPU’s systolic architecture not just optional, but the essential infrastructure for building scalable, quantum-secure decentralized networks.